Datasheet

1134
SAM9X35 [DATASHEET]
11055E–ATARM–10-Mar-2014
46.7.15 Base Layer Channel Enable Register
Name: LCDC_BASECHER
Address: 0xF8038040
Access: Write-only
Reset: 0x00000000
• CHEN: Channel Enable Register
0: No effect.
1: Enable the DMA channel.
• UPDATEEN: Update Overlay Attributes Enable Register
0: No effect.
1: Update windows attributes on the next start of frame.
• A2QEN: Add Head Pointer Enable Register
Write this field to one to add the head pointer to the descriptor list. This field is reset by hardware as soon as the head register is
added to the list.
31 30 29 28 27 26 25 24
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23 22 21 20 19 18 17 16
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15 14 13 12 11 10 9 8
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76543210
–––––A2QENUPDATEENCHEN