Datasheet

943
SAM9X25 [DATASHEET]
11054E–ATARM–10-Mar-2014
41.9.15 CAN Message Acceptance Mask Register
Name: CAN_MAMx [x=0..7]
Address: 0xF8000204 (0)[0], 0xF8000224 (0)[1], 0xF8000244 (0)[2], 0xF8000264 (0)[3], 0xF8000284 (0)[4],
0xF80002A4 (0)[5], 0xF80002C4 (0)[6], 0xF80002E4 (0)[7], 0xF8004204 (1)[0], 0xF8004224 (1)[1], 0xF8004244 (1)[2],
0xF8004264 (1)[3], 0xF8004284 (1)[4], 0xF80042A4 (1)[5], 0xF80042C4 (1)[6], 0xF80042E4 (1)[7]
Access: Read-write
This register can only be written if the WPEN bit is cleared in ”CAN Write Protection Mode Register”.
To prevent concurrent access with the internal CAN core, the application must disable the mailbox before writing to CAN_MAMx
registers.
• MIDvB: Complementary bits for identifier in extended frame mode
Acceptance mask for corresponding field of the message IDvB register of the mailbox.
• MIDvA: Identifier for standard frame mode
Acceptance mask for corresponding field of the message IDvA register of the mailbox.
• MIDE: Identifier Version
0: Compares IDvA from the received frame with the CAN_MIDx register masked with CAN_MAMx register.
1: Compares IDvA and IDvB from the received frame with the CAN_MIDx register masked with CAN_MAMx register.
31 30 29 28 27 26 25 24
– – MIDE MIDvA
23 22 21 20 19 18 17 16
MIDvA MIDvB
15 14 13 12 11 10 9 8
MIDvB
76543210
MIDvB