Datasheet

873
SAM9X25 [DATASHEET]
11054E–ATARM–10-Mar-2014
39.8.26 USART LIN Mode Register
Name: US_LINMR
Address: 0xF801C054 (0), 0xF8020054 (1), 0xF8024054 (2), 0xF8028054 (3)
Access: Read-write
This register is relevant only if USART_MODE=0xA or 0xB in “USART Mode Register” on page 844.
This register can only be written if the WPEN bit is cleared in “USART Write Protect Mode Register” on page 877.
• NACT: LIN Node Action
Values which are not listed in the table must be considered as “reserved”.
• PARDIS: Parity Disable
0: In Master node configuration, the Identifier Parity is computed and sent automatically. In Master node and Slave node configu-
ration, the parity is checked automatically.
1:Whatever the node configuration is, the Identifier parity is not computed/sent and it is not checked.
• CHKDIS: Checksum Disable
0: In Master node configuration, the checksum is computed and sent automatically. In Slave node configuration, the checksum is
checked automatically.
1: Whatever the node configuration is, the checksum is not computed/sent and it is not checked.
• CHKTYP: Checksum Type
0: LIN 2.0 “Enhanced” Checksum
1: LIN 1.3 “Classic” Checksum
• DLM: Data Length Mode
0: The response data length is defined by the field DLC of this register.
1: The response data length is defined by the bits 5 and 6 of the Identifier (IDCHR in US_LINIR).
31 30 29 28 27 26 25 24
––––––––
23 22 21 20 19 18 17 16
–––––––PDCM
15 14 13 12 11 10 9 8
DLC
76543210
WKUPTYP FSDIS DLM CHKTYP CHKDIS PARDIS NACT
Value Name Description
00 PUBLISH The USART transmits the response.
01 SUBSCRIBE The USART receives the response.
10 IGNORE The USART does not transmit and does not receive the response.