Datasheet

743

SAM9X25 [DATASHEET]

11054E–ATARM–10-Mar-2014

38. Two-wire Interface (TWI)

38.1 Description

The Atmel Two-wire Interface (TWI) interconnects components on a unique two-wire bus, made up of one clock line and

one data line with speeds of up to 400 Kbits per second, based on a byte-oriented transfer format. It can be used with

any Atmel Two-wire Interface bus Serial EEPROM and I²C compatible device such as Real Time Clock (RTC), Dot

Matrix/Graphic LCD Controllers and Temperature Sensor, to name but a few. The TWI is programmable as a master or a

slave with sequential or single-byte access. Multiple master capability is supported.

Arbitration of the bus is performed internally and puts the TWI in slave mode automatically if the bus arbitration is lost.

A configurable baud rate generator permits the output data rate to be adapted to a wide range of core clock frequencies.

Below,

Table 38-1 lists the compatibility level of the Atmel Two-wire Interface in Master Mode and a full I

C compatible

device.

Note: 1. START + b000000001 + Ack + Sr

Table 38-1. Atmel TWI compatibility with I

C Standard

C Standard Atmel TWI

Standard Mode Speed (100 KHz) Supported

Fast Mode Speed (400 KHz) Supported

7 or 10 bits Slave Addressing Supported

START BYTE

(1)

Not Supported

Repeated Start (Sr) Condition Supported

ACK and NACK Management Supported

Slope control and input filtering (Fast mode) Not Supported

Clock stretching Supported

Multi Master Capability Supported