Datasheet

256
SAM9X25 [DATASHEET]
11054E–ATARM–10-Mar-2014
23.7.29 PIO Slow Clock Divider Debouncing Register
Name: PIO_SCDR
Address: 0xFFFFF48C (PIOA), 0xFFFFF68C (PIOB), 0xFFFFF88C (PIOC), 0xFFFFFA8C (PIOD)
Access: Read-write
• DIVx: Slow Clock Divider Selection for Debouncing
Tdiv_slclk = 2*(DIV+1)*Tslow_clock.
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–– DIV
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DIV