Datasheet

151
SAM9X25 [DATASHEET]
11054E–ATARM–10-Mar-2014
• WDDIS: Watchdog Disable
0: Enables the Watchdog Timer.
1: Disables the Watchdog Timer.
17.5.3 Watchdog Timer Status Register
Register Name: WDT_SR
Address: 0xFFFFFE48
Access Type: Read-only
• WDUNF: Watchdog Underflow
0: No Watchdog underflow occurred since the last read of WDT_SR.
1: At least one Watchdog underflow occurred since the last read of WDT_SR.
• WDERR: Watchdog Error
0: No Watchdog error occurred since the last read of WDT_SR.
1: At least one Watchdog error occurred since the last read of WDT_SR.
Note: The WDD and WDV values must not be modified within a period of time of 3 slow clock periods following a restart of
the watchdog performed by means of a write access in the WDT_CR register, else the watchdog may trigger an end
of period earlier than expected.
31 30 29 28 27 26 25 24
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23 22 21 20 19 18 17 16
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15 14 13 12 11 10 9 8
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76543210
––––––WDERRWDUNF