Datasheet

1140
SAM9X25 [DATASHEET]
11054E–ATARM–10-Mar-2014
CAN:
Added information on Write Protected Registers:
- added a line in Section 41.2 “Embedded Characteristics”
- added rows for Write Protect Mode Register (CAN_WPMR) and Write Protect Status Register (CAN_WPSR) in
Table 41-6 “Register Mapping”
- added Section 41.8.5 “Write Protected Registers” on page 922, Section 41.9.12 “CAN Write Protection Mode
Register” on page 940 and Section 41.9.13 “CAN Write Protection Status Register” on page 941
-
added a phrase specifying when a register can be written (restricted by CAN Write Protection Mode Register) in:
Section 41.9.1 “CAN Mode Register”
Section 41.9.6 “CAN Baudrate Register”
Section 41.9.14 “CAN Message Mode Register”
Section 41.9.15 “CAN Message Acceptance Mask Register”
Section 41.9.16 “CAN Message ID Register”
Updated offsets for reserved registers in Table 41-6 “Register Mapping”:
- 0x002C - 0x01FC --> 0x002C - 0x00E0
- added a row: - 0x00EC - 0x01FC
Updated the register table and the corresponding bitfield name in:
Section 41.9.7 “CAN Timer Register”
Section 41.9.8 “CAN Timestamp Register”
Section 41.9.14 “CAN Message Mode Register”
Section 41.9.18 “CAN Message Status Register”
Section 41.9.1 “CAN Mode Register”, fixed a typo in “LPM: Disable/Enable Low Power Mode” (‘w’ --> ‘0’).
Section 41.9.14 “CAN Message Mode Register”, updated the bitfield table in “MOT: Mailbox Object Type” .
Section 41.6.1 “I/O Lines”, added Table 41-2 “I/O Lines”.
8215
ADC:
Section 42.7.15 “ADC Compare Window Register”, added two paragraphs about programming LOWTHRES and
HIGHTHRES bitfields depending on the LOWRES bitfield settings (ADC Mode Register).
Section 42.6.4 “Conversion Results”, removed “...and EOC bit corresponding to the last converted channel” from
the last phrase of the third paragraph.
Section 42.2 “Embedded Characteristics”, added the value of Conversion Rate in the 2nd line.
8045
8357
8385
SSC:
Section 44.7.1.1 “Clock Divider”, removed Table 43-4 related to Figure 44-5 “Divided Clock Generation”
(duplicated data in Section 44.7.1.4 “Serial Clock Ratio Considerations”).
Section 44.6.3 “Interrupt”, replaced AIC references with “interrupt controller”.
Section 44.9 “Synchronous Serial Controller (SSC) User Interface”:
- updated descriptions of CKS, CKO, and CKG bitfields in:
Section 44.9.3 “SSC Receive Clock Mode Register”
Section 44.9.5 “SSC Transmit Clock Mode Register”
- updated register tables and a description of FSOS bitfield in:
Section 44.9.4 “SSC Receive Frame Mode Register”
Section 44.9.6 “SSC Transmit Frame Mode Register”
Section 44.9.14 “SSC Interrupt Enable Register”, fixed a typo (0=0= --> 0=).
7303
8466
Doc. Rev.
11054C Comments
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