Datasheet

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SAM9X25 [DATASHEET]

11054E–ATARM–10-Mar-2014

Section 25. “Bus Matrix (MATRIX)”

Updated Table 25-1 “List of Bus Matrix Masters”:

- Master 9 (was ISI DMA; is Reserved)

- Master 10 (was EMAC DMA; is EMAC0 DMA)

- added Master 11 (EMAC1 DMA)

Section 25.2.2 “Matrix Slaves”: in first sentence, replaced “manages 9 slaves” with “manages 10 slaves”

Updated Table 25-3 “Master to Slave Access”:

- Master 9 (was ISI DMA; is Reserved)

- Master 10 (was EMAC DMA; is EMAC0 DMA)

- modified Master 11 (was Reserved; is EMAC1 DMA)

Section 25.6 “Register Write Protection”: changed title (was “Write Protect Registers”) and revised contents

Deleted section “Chip Configuration User Interface” (register CCFG_EBICSA is now found in Section 25.7 “Bus Matrix

(MATRIX) User Interface”

Table 25-4 “Register Mapping”:

- defined offset 0x0024 as reserved

- defined offsets 0x0104–0x011C as reserved

- at offset 0x0120, inserted register CCFG_EBICSA

- defined offsets 0x0124–0x01FC as reserved

Section 25.7.1 “Bus Matrix Master Configuration Registers”:

- updated register range in Name (was MATRIX_MCFG0...MATRIX_MCFG10; is MATRIX_MCFG0...MATRIX_MCFG11)

and removed address 0xFFFFDE24 of non-implemented MATRIX_MCFG9

- inserted sentence about write protection

Section 25.7.2 “Bus Matrix Slave Configuration Registers”: inserted sentence about write protection

Section 25.7.3 “Bus Matrix Priority Registers A For Slaves”:

- updated register range in Name (was MATRIX_PRAS0...MATRIX_PRAS8; is MATRIX_PRAS0...MATRIX_PRAS9)

- inserted sentence about write protection

Section 25.7.4 “Bus Matrix Priority Registers B For Slaves”:

- updated register range in Name (was MATRIX_PRBS0...MATRIX_PRBS8; is MATRIX_PRBS0...MATRIX_PRBS9)

- added field M11PR in register bits 13:12

- removed field M9PR from register bits 5:4

- inserted sentence about write protection

Section 25.7.5 “Bus Matrix Master Remap Control Register”:

- added bit RCB11 to register bit 11

- removed bit RCB9 from register bit 9

- inserted sentence about write protection

Section 25.7.6 “EBI Chip Select Assignment Register”: changed reset value from 0x00000000 to 0x00000200; updated