Datasheet

5
6289CS–ATARM–28-May-09
AT91SAM9R64/RL64
2. Block Diagrams
Figure 2-1. AT91SAM9R64 Block Diagram
AIC
D0-D15 A0/NBS0 A2-A15 A16/BA0 A17/BA1 NCS0 NCS1/SDCS NRD/CFOE NWR0/NWE/CFWE NWR1/NBS1/CFIOR NWR3/NBS3/CFIOW SDCK, SDCKE RAS, CAS SDWE, SDA10
FIQ
IRQ
PLLRCA
DRXD
DTXD
APB
PLLA
A1/NBS2/NWR2
TST
PCK0-PCK1
System Controller
VDDBU
SHDN
WKUP
XIN
NRST
NANDOE, NANDWE
PMC
UPLL
XOUT
WDT
RTT
32 kHz
OSC
XIN32
XOUT32
SHDC
RSTC
DBGU
SLAVEMASTER
PDC
4
GPBREG
A23-A24, A18-A20
A25/CFRNW NCS4/CFCS0 NWAIT CFCE1-CFCE2
EBI
Static
Memory
Controller
CompactFlash
NAND Flash
& ECC
NCS3/NANDCS
TWI0
USART0 USART1 USART2 USART3
PWM
TC0 TC1 TC2
SSC0
PDC
Peripheral
DMA
Controller
Peripheral
Bridge
ROM
32K Bytes
2-channel
DMA
12 MHz
OSC
USB
Device
HS
3-channel 10-bit ADC
PDC
SDRAM
Controller
DA0-DA3
CDA
CK
TWD0
TWCK0
CTS1
RTS1
RXD0-RXD3
TXD0-TXD3
NPCS0-NPCS1
SPCK
MOSI
MISO
TIOA0
TIOB0
TK0
TF0
TD0
RD0
RF0
RK0
TSADTRG
AD0
TSADVREF
VDDANA
GNDAN
SRAM
64K Bytes
HS UTMI
Transceiver
POR
ARM926EJ-S Processor
JTAG Selection and Boundary Scan
In-Circuit Emulator
TDI
TDO
TMS
TCK
JTAGSEL
I
RTCK
ICache
4 Kbytes
DCache
4 Kbytes
BMS
RTC
RC
TCM
Interface
ITCM DTCM
A21/NANDALE A22/NANDCLE
POR
VDDCORE
AD1
PDC
AD2
5-layer AHB Bus Matrix
D
PIT
PIOA
PIOC
PIOD
PIOB
PDC
PDC
PDC
DMA
VBG
DFSDP
DFSDM
DHSDP
DHSDM
GNDUTMI
VDDUTMII
VDDUTMIC
PWM1
TCLK0
TCLK2
PWM3
PWM0
SPI
MCI
NTRST