Datasheet

27
6289CS–ATARM–28-May-09
AT91SAM9R64/RL64
8.2.3 SDRAM Controller
• Supported devices:
– Standard and Low Power SDRAM (Mobile SDRAM)
– 2K, 4K, 8K Row Address Memory Parts
– SDRAM with two or four Internal Banks
– SDRAM with 16- or 32-bit Data Path
• Programming facilities
– Word, half-word, byte access
– Automatic page break when Memory Boundary has been reached
– Multibank Ping-pong Access
– Timing parameters specified by software
– Automatic refresh operation, refresh rate is programmable
• Energy-saving capabilities
– Self-refresh, power down and deep power down modes supported
• Error detection
– Refresh Error Interrupt
• SDRAM Power-up Initialization by software
• SDRAM CAS Latency of 1, 2 and 3 supported
• Auto Precharge Command not used
8.2.4 NAND Flash Error Corrected Code Controller
• Tracking the accesses to a NAND Flash device by trigging on the corresponding chip select
• Single bit error correction and 2-bit Random detection.
• Automatic Hamming Code Calculation while writing
– ECC value available in a register
• Automatic Hamming Code Calculation while reading
– Error Report, including error flag, correctable error flag and word address being
detected erroneous
– Support 8- or 16-bit NAND Flash devices with 512-, 1024-, 2048- or 4096-bytes
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