Datasheet

611
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
35.14.16 HSMCI DMA Configuration Register
Name: HSMCI_DMA
Address: 0xF0008050
Access: Read/Write
This register can only be written if the WPEN bit is cleared in “HSMCI Write Protection Mode Register” .
• OFFSET: DMA Write Buffer Offset
This field indicates the number of discarded bytes when the DMA writes the first word of the transfer.
• CHKSIZE: DMA Channel Read and Write Chunk Size
The CHKSIZE field indicates the number of data available when the DMA chunk transfer request is asserted.
• DMAEN: DMA Hardware Handshaking Enable
0: DMA interface is disabled.
1: DMA Interface is enabled.
Note: To avoid unpredictable behavior, DMA hardware handshaking must be disabled when CPU transfers are performed.
• ROPT: Read Optimization with padding
0: BLKLEN bytes are moved from the Memory Card to the system memory; two DMA descriptors are used when the transfer size
is not a multiple of 4.
1: CEILING(BLKLEN/4) * 4 bytes are moved from the Memory Card to the system memory; only one DMA descriptor is used.
31 30 29 28 27 26 25 24
––––––––
23 22 21 20 19 18 17 16
––––––––
15 14 13 12 11 10 9 8
–––ROPT–––DMAEN
76543210
– CHKSIZE – – OFFSET
Value Name Description
0 1 1 data available
1 4 4 data available
2 8 8 data available
3 16 16 data available
4 32 32 data available