Datasheet

589
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
35.14 High Speed MultiMedia Card Interface (HSMCI) User Interface
Note: 1. The Response Register can be read by N accesses at the same HSMCI_RSPR or at consecutive addresses (0x20 to
0x2C). N depends on the size of the response.
Table 35-8. Register Mapping
Offset Register Name Access Reset
0x00 Control Register HSMCI_CR Write –
0x04 Mode Register HSMCI_MR Read/Write 0x0
0x08 Data Timeout Register HSMCI_DTOR Read/Write 0x0
0x0C SD/SDIO Card Register HSMCI_SDCR Read/Write 0x0
0x10 Argument Register HSMCI_ARGR Read/Write 0x0
0x14 Command Register HSMCI_CMDR Write-only –
0x18 Block Register HSMCI_BLKR Read/Write 0x0
0x1C Completion Signal Timeout Register HSMCI_CSTOR Read/Write 0x0
0x20 Response Register
(1)
HSMCI_RSPR Read-only 0x0
0x24 Response Register
(1)
HSMCI_RSPR Read-only 0x0
0x28 Response Register
(1)
HSMCI_RSPR Read-only 0x0
0x2C Response Register
(1)
HSMCI_RSPR Read-only 0x0
0x30 Receive Data Register HSMCI_RDR Read-only 0x0
0x34 Transmit Data Register HSMCI_TDR Write-only –
0x38–0x3C Reserved – – –
0x40 Status Register HSMCI_SR Read-only 0xC0E5
0x44 Interrupt Enable Register HSMCI_IER Write-only –
0x48 Interrupt Disable Register HSMCI_IDR Write-only –
0x4C Interrupt Mask Register HSMCI_IMR Read-only 0x0
0x50 DMA Configuration Register HSMCI_DMA Read/Write 0x00
0x54 Configuration Register HSMCI_CFG Read/Write 0x00
0x58–0xE0 Reserved – – –
0xE4 Write Protection Mode Register HSMCI_WPMR Read/Write –
0xE8 Write Protection Status Register HSMCI_WPSR Read-only –
0xEC–0xFC Reserved – – –
0x100–0x1FC Reserved – – –
0x200 FIFO Memory Aperture0 HSMCI_FIFO0 Read/Write 0x0
... ... ... ... ...
0x5FC FIFO Memory Aperture255 HSMCI_FIFO255 Read/Write 0x0