Datasheet

Table Of Contents
430
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
Figure 31-14. Burst Read Access, Latency = 2, Low-power DDR1-SDRAM Devices
Figure 31-15. Burst Read Access, Latency = 3, DDR2-SDRAM Devices
Col a
NOP READ NOP
0
Latency = 2
SDCLK
A[12:0]
COMMAND
BA[1:0]
DQS[1:0]
Da
Db
Dc
Dd De Df Dg Dh
D[15:0]
3
DM[1:0]
Col a
NOP READ NOP
0
Latency = 3
SDCLK
A[12:0]
COMMAND
BA[1:0]
DQS[1:0]
Da
Db
Dc
Dd De Df Dg Dh
D[15:0]
3
DM[1:0]