Datasheet

1091
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
Doc. Rev
11063E
Comments Change
Request
Ref.
Overview:
“Description”, updated...”Processor running up to 400 MHz...”
updated...”System running up to 133 MHz...”
7847
DDRSDRC:
Former Section 29.7 “Programmable IO Delays” removed from datasheet.
7891
PIO:
Section 23.5.11 “Programmable I/O Delays”, “Only PADs PA[15:11] and PA[20:18] can be configured.”
Section 23.5.12 “Programmable I/O Drive”, “It is possible to configure the I/O drive for pads PA[31:0],
PB[18:0] and PC[31:0].”
7886
PMC:
Section 21.2 “Embedded Characteristics”, updated, “266 MHz DDR system clock”.
Section 22.12.8 “PMC Clock Generator Main Clock Frequency Register”, added RCMEAS bit to register.
7874
7726
Electrical Characteristics:
Table 48-3, “Power Consumption for Different Modes”,
 Updated, Active mode power consumption, 103 mA
 Updated, Idle mode power consumption, 33 mA
Table 48-5, “Processor Clock Waveform Parameters”
 Updated, MAX = 400 MHz
Table 48-6, “System Clock Waveform Parameters”
Updated, MAX = 133 MHz
7847
Section 46.14.5 Two-wire Serial Interface Characteristics removed.
Footnotes updated in Table 48-34, “SSC Timings”
7863
Back page:
Updated point of contact information. Marcom
Doc. Rev
11063D
Comments Change
Request
Ref.
Overview:
Section 6. “Memories”, ...Internal ROM... bootstrap routine, revised.
Section 8.5 “Fuse Box Features”, removed table 8.3
rfo
Debug and Test:
Section 10.6.3 “Debug Unit”, removed unnecessary line on Chip ID
Section 10.6.5 “JTAG ID Code Register”, fixed typo in title, revised part number and JTAG ID Code value.
rfo
DMAC:
Section 32.2 “Embedded Characteristics”, missing elements recovered. 7271
TRNG:
Section 47. “True Random Number Generator (TRNG)”, faulty section number corrected. Subsequent
section numbering and TOC affected.
rfo: