Datasheet

1063
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
Table 48-31. SPI Timings with 3.3V Peripheral Supply
Symbol Parameter Cond Min Max Units
Master Mode
SPI
SPCK
SPI Clock 66 MHz
SPI
0
MISO Setup time before SPCK rises 13.7 ns
SPI
1
MISO Hold time after SPCK rises 0 ns
SPI
2
SPCK rising to MOSI 0 7.6 ns
SPI
3
MISO Setup time before SPCK falls 13.2 ns
SPI
4
MISO Hold time after SPCK falls 0 ns
SPI
5
SPCK falling to MOSI 0 7.7 ns
Slave Mode
SPI
6
SPCK falling to MISO 2.7 14.1 ns
SPI
7
MOSI Setup time before SPCK rises 2.7 ns
SPI
8
MOSI Hold time after SPCK rises 0.2 ns
SPI
9
SPCK rising to MISO 2.5 13.8 ns
SPI
10
MOSI Setup time before SPCK falls 2.2 ns
SPI
11
MOSI Hold time after SPCK falls 0.6 ns
SPI
12
NPCS0 setup to SPCK rising 4.3 ns
SPI
13
NPCS0 hold after SPCK falling 0 ns
SPI
14
NPCS0 setup to SPCK falling 3.8 ns
SPI
15
NPCS0 hold after SPCK rising 0 ns
SPI
16
NPCS0 falling to MISO valid 14.5 ns
Table 48-32. SPI Timings with 1.8V Peripheral Supply
Symbol Parameter Cond Min Max Units
Master Mode
SPI
SPCK
SPI Clock 66 MHz
SPI
0
MISO Setup time before SPCK rises 16.3 ns
SPI
1
MISO Hold time after SPCK rises 0 ns
SPI
2
SPCK rising to MOSI 0 6.9 ns
SPI
3
MISO Setup time before SPCK falls 15.1 ns
SPI
4
MISO Hold time after SPCK falls 0 ns
SPI
5
SPCK falling to MOSI 0 7.0 ns
Slave Mode
SPI
6
SPCK falling to MISO 3.5 16.8 ns
SPI
7
MOSI Setup time before SPCK rises 2.9 ns
SPI
8
MOSI Hold time after SPCK rises 0.3 ns
SPI
9
SPCK rising to MISO 3.3 16.4 ns