Datasheet

Table Of Contents
1047
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
48.4 Clock Characteristics
48.4.1 Processor Clock
48.4.2 System Clock
The system clock is the maximum clock at which the system is able to run. It is given by the smallest value of the internal
bus clock and EBI clock.
Note: 1. With DDR2 usage. There is no limitations for LPDDR, SDRAM and mobile SDRAM.
Table 48-4. Power Consumption by Peripheral in Active Mode
Peripheral Consumption Unit
PIO Controller 6
µA/MHz
USART 6
ADC 5
TWI 2
SPI 3
UART 3
UHP 5
UDP 5
LCDC 3
PWM 6
HSMCI 3
SSC 5
Timer Counter Channels 12
DMA 1
AES 4
SHA 3
TRNG 1
Table 48-5. Processor Clock Waveform Parameters
Symbol Parameter Conditions Min Max Units
1/(t
CPPCK
) Processor Clock Frequency V
VDDCORE
min 250
(1)
400 MHz
Table 48-6. System Clock Waveform Parameters
Symbol Parameter Conditions Min Max Units
1/(t
CPMCK
) System Clock Frequency V
VDDCORE
min 125
(1)
133 MHz