Datasheet

Table Of Contents
1046
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
48.3 Power Consumption
Typical power consumption of PLLs, Slow Clock and Main Oscillator.
Power consumption of power supply in four different modes: Active, Idle, Ultra Low-power and Backup.
Power consumption by peripheral: calculated as the difference in current measurement after having enabled then
disabled the corresponding clock.
48.3.1 Power Consumption versus Modes
The values in Table 48-3 and Table 48-4 on page 1047 are estimated values of the power consumption with operating
conditions as follows:
V
DDIOM
= 1.8V
V
DDIOP0 and 1
= 3.3V
V
DDPLL
= 1.0V
V
DDCORE
= 1.0V
V
DDBU
= 3.3V
TA = 25°C
There is no consumption on the I/Os of the device
Figure 48-1. Measures Schematics
These figures represent the power consumption estimated on the power supplies.
Table 48-3. Power Consumption for Different Modes
Mode Conditions Consumption Unit
Active
ARM Core clock is 400 MHz.
MCK is 133 MHz.
All peripheral clocks activated.
onto AMP2
103 mA
Idle
Idle state, waiting an interrupt.
All peripheral clocks de-activated.
onto AMP2
33 mA
Ultra low
power
ARM Core clock is 500 Hz.
All peripheral clocks de-activated.
onto AMP2
7mA
Backup
Device only V
DDBU
powered
onto AMP1
A
VDDCORE
VDDBU
AMP2
AMP1