Datasheet

1017
SAM9N12/SAM9CN11/SAM9CN12 [DATASHEET]
11063K–ATARM–05-Nov-13
45.6.6 AES Interrupt Status Register
Name: AES_ISR
Address: 0xF000C01C
Access: Read-only
• DATRDY: Data Ready
0: Output data not valid.
1: Encryption or decryption process is completed.
DATRDY is cleared when a Manual encryption/decryption occurs (START bit in AES_CR) or when a software triggered hardware
reset of the AES interface is performed (SWRST bit in AES_CR).
LOD = 0 (AES_MR):
In Manual and Auto mode, the DATRDY flag can also be cleared when at least one of the Output Data Registers is read.
In DMA mode, DATRDY is set and cleared automatically.
LOD = 1 (AES_MR):
In Manual and Auto mode, the DATRDY flag can also be cleared when at least one of the Input Data Registers is written.
In DMA mode, DATRDY is set and cleared automatically.
• URAD: Unspecified Register Access Detection Status
0: No unspecified register access has been detected since the last SWRST.
1: At least one unspecified register access has been detected since the last SWRST.
URAD bit is reset only by the SWRST bit in the AES_CR.
• URAT: Unspecified Register Access:
Only the last Unspecified Register Access Type is available through the URAT field.
URAT field is reset only by the SWRST bit in the AES_CR.
31 30 29 28 27 26 25 24
––––––––
23 22 21 20 19 18 17 16
––––––––
15 14 13 12 11 10 9 8
URAT – – – URAD
76543210
–––––––DATRDY
Value Name Description
0x0 IDR_WR_PROCESSING Input Data Register written during the data processing when SMOD = 0x2 mode.
0x1 ODR_RD_PROCESSING Output Data Register read during the data processing.
0x2 MR_WR_PROCESSING Mode Register written during the data processing.
0x3 ODR_RD_SUBKGEN Output Data Register read during the sub-keys generation.
0x4 MR_WR_SUBKGEN Mode Register written during the sub-keys generation.
0x5 WOR_RD_ACCESS Write-only register read access.