User manual

Programmer’s Model

The fully-associative part (also referred to as the lockdown part of the TLB) is used to

store entries to be locked down. Entries held in the lockdown part of the TLB are

preserved during an invalidate TLB operation. Entries can be removed from the

lockdown TLB using an invalidate TLB single entry operation.

Six TLB operations are defined, and the function to be performed is selected by the

Opcode_2 and CRm fields in the MCR instruction used to write CP15 c8. Writing other

Opcode_2 or CRm values is Unpredictable. Reading from this register is Unpredictable.

You can use the instructions shown in Table 2-19 to perform TLB operations.

Those instructions that are intended to be used with dual TLB implementations (such as

the ARM920T core or the ARM1020T core) apply to any entry, regardless of the type

of access that caused the entry to be loaded into the TLB (see the ARM Architecture

Reference Manual).

The invalidate TLB operations invalidate all the unpreserved entries in the TLB. The

invalidate TLB single entry operations invalidate any TLB entry corresponding to the

Modified Virtual Address given in Rd, regardless of its preserved state. See TLB

Lockdown Register c10 on page 2-32 for a description of how to preserve entries in the

TLB.

Figure 2-11 on page 2-26 shows the Modified Virtual Address format used for

invalidate TLB single entry operations.

Table 2-19 Register c8 TLB operations

ARMv4/ARMv5 operation ARM926EJ-S operation Data Instruction

Invalidate TLB Invalidate set-associative TLB SBZ

MCR p15, 0, <Rd>, c8, c7, 0

Invalidate TLB single entry (MVA) Invalidate single entry MVA

MCR p15, 0, <Rd>, c8, c7, 1

Invalidate instruction TLB Invalidate set-associative TLB SBZ

MCR p15, 0, <Rd>, c8, c5, 0

Invalidate instruction TLB single entry (MVA) Invalidate single entry MVA

MCR p15, 0, <Rd>, c8, c5, 1

Invalidate data TLB Invalidate set-associative TLB SBZ

MCR p15, 0, <Rd>, c8, c6, 0

Invalidate data TLB single entry (MVA) Invalidate single entry MVA

MCR p15, 0, <Rd>, c8, c6, 1