User manual

Glossary
ARM DDI0198D Copyright © 2001-2003 ARM Limited. All rights reserved. Glossary-5
Cache A block of on-chip or off-chip fast access memory locations, situated between the
processor and main memory, used for storing and retrieving copies of often used
instructions and/or data. This is done to greatly reduce the average speed of memory
accesses and so to increase processor performance.
See also Cache terminology diagram on the last page of this glossary.
Cache contention When the number of frequently-used memory cache lines that use a particular cache set
exceeds the set-associativity of the cache. In this case, main memory activity increases
and performance decreases.
Cache hit A memory access that can be processed at high speed because the instruction or data
that it addresses is already held in the cache.
Cache line The basic unit of storage in a cache. It is always a power of two words in size (usually
four or 8 words), and is required to be aligned to a suitable memory boundary.
See also Cache terminology diagram on the last page of this glossary.
Cache line index The number associated with each cache line in a cache way. Within each cache way, the
cache lines are numbered from 0 to (set associativity) -1.
See also Cache terminology diagram on the last page of this glossary.
Cache lockdown To fix a line in cache memory so that it cannot be overwritten. Cache lockdown enables
critical instructions and/or data to be loaded into the cache so that the cache lines
containing them are not subsequently reallocated. This ensures that all subsequent
accesses to the instructions/data concerned are cache hits, and therefore complete as
quickly as possible.
Cache miss A memory access that cannot be processed at high speed because the instruction/data it
addresses is not in the cache and a main memory access is required.
Cache set A cache set is a group of cache lines (or blocks). A set contains all the ways that can be
addressed with the same index. The number of cache sets is always a power of two.
See also Cache terminology diagram on the last page of this glossary.
Cache way A group of cache lines (or blocks). It is 2 to the power of the number of index bits in size.
See also Cache terminology diagram on the last page of this glossary.
CAM See Content Addressable Memory.
Cast out See Victim.