User manual

Signal Descriptions
A-8 Copyright © 2001-2003 ARM Limited. All rights reserved. ARM DDI0198D
DBGRNG[1:0]
EmbeddedICE-RT
range out
Output Indicates that the corresponding EmbeddedICE-RT
watchpoint register has matched the conditions
currently present on the address, data, and control
buses. This signal is independent of the state of the
watchpoint enable control bit.
DBGRQI
Internal debug request
Output Represents the debug request signal that is presented
to the core debug logic. This is a combination of
EDBGRQ and bit 1 of the debug control register.
EDBGRQ
External debug request
Input An external debugger can force the processor into
debug state by asserting this signal.
Table A-3 Debug signals (continued)
Name Direction Description