Datasheet

11096AS–ATARM–4-Oct-11

SAM9N12

– Automatic processing and verification of the “Synch Break” and the “Synch Field”

– The “Synch Break” is detected even if it is partially superimposed with a data byte

– Automatic Identifier parity calculation/sending and verification

– Parity sending and verification can be disabled

– Automatic Checksum calculation/sending and verification

– Checksum sending and verification can be disabled

– Support both “Classic” and “Enhanced” checksum types

– Full LIN error checking and reporting

– Frame Slot Mode: the Master allocates slots to the scheduled frames automatically.

– Generation of the Wakeup signal

• Test Modes

– Remote Loopback, Local Loopback, Automatic Echo

9.24 Universal Asynchronous Receiver Transmitters (UART)

•Two UARTs

• Independent receiver and transmitter with a common programmable Baud Rate Generator

• Even, Odd, Mark or Space Parity Generation

• Parity, Framing and Overrun Error Detection

• Automatic Echo, Local Loopback and Remote Loopback Channel Modes

9.25 Analog-to-Digital Converter (ADC)

• 12-channel ADC

• 5-channel to support 4wire and 5-wire resistive Touch Screen

• 10-bit 384 Ksamples/sec. Successive Approximation Register ADC

• -3/+3 LSB Integral Non Linearity, -2/+2 LSB Differential Non Linearity

• Integrated 12-to-1 multiplexer, offering twelve independent 3.3V analog inputs

• External voltage reference for better accuracy on low voltage inputs

• Individual enable and disable of each channel

• Multiple trigger sources

– Hardware or software trigger

– External trigger pin

– Timer Counter 0 to 2 outputs TIOA0 to TIOA2 trigger

• Sleep Mode and conversion sequencer

– Automatic wakeup on trigger and back to sleep mode after conversions of all

enabled channels

• Compare level interrupt for background signal surveillance

9.26 Serial Synchronous Controller (SSC)

• One SSC

• Provides serial synchronous communication links used in audio and telecom applications

(with CODECs in Master or Slave Modes, I

S, TDM Buses, Magnetic Card Reader, ...)

• Contains an independent receiver and transmitter and a common clock divider