Datasheet

33
11096AS–ATARM–4-Oct-11
SAM9N12
Programmable Interrupt generation on DMA Transfer completion Block Transfer
completion, Single/Multiple transaction completion or Error condition
9.16 USB Device Full Speed (UDP)
USB V2.0 full-speed compliant, 12 MBits per second
Embedded USB V2.0 full-speed transceiver
Embedded 2,432-byte dual-port RAM for endpoints
Suspend/Resume logic
Ping-pong mode (two memory banks) for isochronous and bulk endpoints
Six general-purpose endpoints
Endpoint 0 and 3: 64 bytes, no ping-pong mode
Endpoint 1 and 2: 64 bytes, ping-pong mode
Endpoint 4 and 5: 512 bytes, ping-pong mode
Embedded pull-up on pad
9.17 USB Host Full Speed (UHP)
Compliance with Open HCI Rev 1.0 Specification
Compliance with USB V2.0 Full-speed and Low-speed Specification
Supports both Low-Speed 1.5 Mbps and Full-speed 12 Mbps devices
Root hub integrated with one downstream USB ports
One embedded USB transceiver
Supports power management
Operates as a master on the Matrix
9.18 High Speed Multimedia Card Interface (HSMCI)
8-bit HSMCI controllers
Compatibility with MMC Plus Specification Version 4.3
Compatibility with MultiMedia Card Specification Version 4.1
Compatibility with SD Memory Card Specification Version 2.0
Compatibility with SDIO Specification Version V2.0.
Compatibility with CE ATA
9.19 Serial Peripheral Interface (SPI)
Two SPIs
Supports communication with serial external devices
Four chip selects with external decoder support allow communication with up to 15
peripherals
Serial memories, such as DataFlash
®
and 3-wire EEPROMs
Serial peripherals, such as ADCs, DACs, LCD Controllers, CAN Controllers and
Sensors
External co-processors