Datasheet

28
11096AS–ATARM–4-Oct-11
SAM9N12
9.3 Real-time Clock (RTC)
• Low power consumption
• Full asynchronous design
• Two hundred year calendar
• Programmable Periodic Interrupt
• Alarm and update parallel load
• Control of alarm and update Time/Calendar Data In
9.4 Periodic Interval Timer (PIT)
• 20-bit Programmable Counter plus 12-bit Interval Counter
• Reset-on-read Feature
• Both Counters Work on Master Clock/16
• AMBA-compliant Interface
– Interfaces to the ARM
®
Advanced Peripheral Bus
9.5 Watchdog Timer (WDT)
• 12-bit Key-protected Programmable Counter
• Provides Reset or Interrupt Signals to the System
• Counter May Be Stopped While the Processor is in Debug State or in Idle Mode
• AMBA-compliant Interface
– Interfaces to the ARM Advanced Peripheral Bus
9.6 Shut Down Controller (SHDWC)
• Shutdown and Wake-up Logic
– Software Assertion of the SHDW Output Pin
– Programmable De-assertion from the WKUP Input Pins
• AMBA-compliant Interface
– Interfaces to the ARM Advanced Peripheral Bus
9.7 General-Purpose Backup Registers (GPBR)
• Four 32-bit backup general-purpose registers
9.8 Power Management Controller (PMC)
The Power Management Controller provides all the clock signals to the system.
PMC input clocks:
• PLLACK: From PLLA
• PLLBCK: From PLLB and dedicated to USB clock generation.
• SLCK: slow clock from external 32K oscillator or internal 32K RC
• MAINCK: Main Clock from external 16MHz oscillator or internal 12M RC