Datasheet

24
11096AS–ATARM–4-Oct-11
SAM9N12
8. Peripherals
8.1 Peripheral Mapping
As shown in Figure 6-1, the Peripherals are mapped in the upper 256M bytes of the address
space between the addresses 0xFFF7 8000 and 0xFFFC FFFF.
Each User Peripheral is allocated 16K bytes of address space.
8.2 Peripheral Identifiers
Table 8-1 defines the Peripheral Identifiers of the SAM9N12. A peripheral identifier is required
for the control of the peripheral interrupt with the Advanced Interrupt Controller and for the con-
trol of the peripheral clock with the Power Management Controller.
Table 8-1. SAM9N12 Peripheral Identifiers
Instance ID Instance name Instance description External interrupt Wired-or interrupt
0 AIC Advanced Interrupt Controller FIQ
1 SYS System Controller Interrupt
DBGU, PMC, SYSC,
PMECC, PMERRLOC
2 PIOA,PIOB Parallel I/O Controller A and B
3 PIOC,PIOD Parallel I/O Controller C and D
4 Reserved
5 USART0 USART 0
6 USART1 USART 1
7 USART2 USART 2
8 USART3 USART 3
9 TWI0 Two-Wire Interface 0
10 TWI1 Two-Wire Interface 1
11 Reserved
12 HSMCI High Speed Multimedia Card Interface
13 SPI0 Serial Peripheral Interface 0
14 SPI1 Serial Peripheral Interface 1
15 UART0 UART 0
16 UART1 UART 1
17 TC0,TC1 Timer Counter 0,1,2,3,4,5
18 PWM Pulse Width Modulation Controller
19 ADC ADC Controller
20 DMAC DMA Controller
21 Reserved
22 UHP USB Host
23 UDP USB Device
24 Reserved
25 LCDC LCD Controller
26 Reserved