Datasheet

30
SAM9M10 [SUMMARY]
6355ES–ATARM–12-Mar-13
8.2 System Controller Block Diagram
Figure 8-1. SAM9M10 System Controller Block Diagram
NRST
SLCK
Advanced
Interrupt
Controller
Real-Time
Timer
Periodic
Interval
Timer
Reset
Controller
PA0-PA31
periph_nreset
System Controller
Watchdog
Timer
wdt_fault
WDRPROC
PIO
Controllers
Power
Management
Controller
XIN
XOUT
MAINCK
PLLACK
pit_irq
MCK
proc_nreset
wdt_irq
periph_irq 2..6
periph_nreset
periph_cl 2..30
PCK
MCK
pmc_irq
nirq
nfiq
rtt_irq
Embedded
Peripherals
periph_cl 2..6
pc 0-1
in
out
enable
ARM926E-S
SLCK
SLCK
irq
fiq
irq0-irq2
fiq
periph_irq 6..30
periph_irq 2..24
int
int
periph_nreset
periph_cl 6..30
tag_nreset
por_ntrst
proc_nreset
periph_nreset
dbgu_txd
dbgu_rxd
pit_irq
dbgu_irq
pmc_irq
rstc_irq
wdt_irq
rstc_irq
SLCK
Boundary Scan
TAP Controller
tag_nreset
debug
PCK
debug
idle
debug
Bus Matrix
MCK
periph_nreset
proc_nreset
bac up_nreset
periph_nreset
idle
Debug
Unit
dbgu_irq
MCK
dbgu_rxd
periph_nreset
dbgu_txd
rtt_alarm
Shut-Down
Controller
SLCK
rtt0_alarm
bac up_nreset
SHDN
WKUP
4 General-purpose
Bac up Registers
bac up_nreset
XIN32
XOUT32
PB0-PB31
PC0-PC31
VDDBU Powered
VDDCORE Powered
ntrst
VDDCORE
POR
12MH
MAIN OSC
PLLA
VDDBU
POR
SLOW
CLOCK
OSC
UPLL
por_ntrst
VDDBU
rtt_irq
UPLLCK
USB High Speed
Device Port
UPLLCK
periph_nreset
periph_irq 24
RC
OSC
PD0-PD31
SCKCR
PE0-PE31
Real-Time
Cloc
rtc_irq
SLCK
bac up_nreset
rtc_alarm
USB High Speed
Host Port
UPLLCK
periph_nreset
periph_irq 25
UHP48M
UHP12M
UHP48M
UHP12M
DDR syscl