Datasheet

894
SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
40.3 Block Diagram
Figure 40-1. TSADCC Block Diagram
TSADC
Interrupt
TSADC
ADTRG
VDDANA
ADVREF
GND
Trigger
Selection
ADC Control
Logic
Successive
Approximation
Register
Analog-to-Digital
Converter
Timer
User
Interface
AIC
Peripheral
Bridge
APB
PDC
AD0X
P
AD1X
M
AD3Y
M
GPAD4
GPADx
AD2Y
P
PIO
Touch
Screen
Switches
Touch Screen
Sequencer
Memory
Controller
TSADC
Clock
PMC
GPADx: last general-purpose ADC channel defined by the number of channels
....
Analog Multiplexer
TSADCC