Datasheet

38
SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
9.4.9 New ARM Instruction Set
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Notes: 1. A Thumb BLX contains two consecutive Thumb instructions, and takes four cycles.
9.4.10 Thumb Instruction Set Overview
The Thumb instruction set is a re-encoded subset of the ARM instruction set.
The Thumb instruction set is divided into:
• Branch instructions
• Data processing instructions
• Load and Store instructions
• Load and Store multiple instructions
• Exception-generating instruction
Table 5 shows the Thumb instruction set, for further details, see the ARM Technical Reference Manual.
Table 9-4 gives the Thumb instruction mnemonic list.
Table 9-3. New ARM Instruction Mnemonic List
Mnemonic Operation Mnemonic Operation
BXJ Branch and exchange to Java MRRC Move double from coprocessor
BLX
(1)
Branch, Link and exchange MCR2
Alternative move of ARM reg to
coprocessor
SMLAxy
Signed Multiply Accumulate 16 *
16 bit
MCRR Move double to coprocessor
SMLAL Signed Multiply Accumulate Long CDP2
Alternative Coprocessor Data
Processing
SMLAWy
Signed Multiply Accumulate 32 *
16 bit
BKPT Breakpoint
SMULxy Signed Multiply 16 * 16 bit PLD
Soft Preload, Memory prepare to
load from address
SMULWy Signed Multiply 32 * 16 bit STRD Store Double
QADD Saturated Add STC2
Alternative Store from
Coprocessor
QDADD Saturated Add with Double LDRD Load Double
QSUB Saturated subtract LDC2 Alternative Load to Coprocessor
QDSUB Saturated Subtract with double CLZ Count Leading Zeroes
Table 9-4. Thumb Instruction Mnemonic List
Mnemonic Operation Mnemonic Operation
MOV Move MVN Move Not
ADD Add ADC Add with Carry
SUB Subtract SBC Subtract with Carry
CMP Compare CMN Compare Negated
TST Test NEG Negate
AND Logical AND BIC Bit Clear
EOR Logical Exclusive OR ORR Logical (inclusive) OR