Datasheet

342
SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
26.11.1 PMC System Clock Enable Register
Name: PMC_SCER
Address: 0xFFFFFC00
Access: Write-only
• DDRCK: DDR Clock Enable
0 = No effect.
1 = Enables the DDR clock.
• UHP: USB Host OHCI Clocks Enable
0 = No effect.
1 = Enables the UHP48M and UHP12M OHCI clocks.
• PCKx: Programmable Clock x Output Enable
0 = No effect.
1 = Enables the corresponding Programmable Clock output.
31 30 29 28 27 26 25 24
––––––––
23 22 21 20 19 18 17 16
––––––––
15 14 13 12 11 10 9 8
––––––PCK1 PCK0
76543210
– UHP – – – DDRCK – –