Datasheet

256
SAM9M10 [DATASHEET]
6355FATARM12-Mar-13
Note: This field is found only in DDR2-SDRAM devices.
EBISHARE: External Bus Interface is Shared
The DDR controller embedded in the EBI is used at the same time as another memory controller (SMC,..)
Reset value is 0.
0 = Only the DDR controller function is used.
1 = The DDR controller shares the EBI with another memory controller (SMC, NAND,..)
ACTBST: ACTIVE Bank X to Burst Stop Read Access Bank Y
Reset value is 0.
0 = After an ACTIVE command in Bank X, BURST STOP command can be issued to another bank to stop current read
access.
1 = After an ACTIVE command in Bank X, BURST STOP command cannot be issued to another bank t o stop current read
access.
This field is unique to SDR-SDRAM, Low-power SDR-SDRAM and Low-power DDR1-SDRAM devices.
OCD
000 OCD calibration mode exit, maintain setting
111 OCD calibration default