Datasheet
v
SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
24.3 Block Diagram ...................................................................................................323
24.4 Functional Description .......................................................................................323
24.5 Peripheral DMA Controller (PDC) User Interface ..............................................326
25 Clock Generator ...................................................................................337
25.1 Description .........................................................................................................337
25.2 Embedded Characteristics ................................................................................337
25.3 Slow Clock Crystal Oscillator .............................................................................337
25.4 Slow Clock RC Oscillator ...................................................................................338
25.5 Slow Clock Selection .........................................................................................338
25.6 Main Oscillator ...................................................................................................341
25.7 Divider and PLLA Block .....................................................................................342
25.8 UTMI Bias and Phase Lock Loop Programming ...............................................343
26 Power Management Controller (PMC) ................................................344
26.1 Description .........................................................................................................344
26.2 Embedded Characteristics ................................................................................344
26.3 Master Clock Controller .....................................................................................346
26.4 Processor Clock Controller ................................................................................346
26.5 USB Device and Host clocks .............................................................................347
26.6 LP-DDR/DDR2 Clock ........................................................................................347
26.7 Peripheral Clock Controller ................................................................................348
26.8 Programmable Clock Output Controller .............................................................348
26.9 Programming Sequence ....................................................................................348
26.10 Clock Switching Details ...................................................................................352
26.11 Power Management Controller (PMC) User Interface ....................................355
27 Advanced Interrupt Controller (AIC) ...................................................375
27.1 Description .........................................................................................................375
27.2 Embedded Characteristics ................................................................................375
27.3 Block Diagram ...................................................................................................376
27.4 Application Block Diagram .................................................................................376
27.5 AIC Detailed Block Diagram ..............................................................................376
27.6 I/O Line Description ...........................................................................................377
27.7 Product Dependencies ......................................................................................377
27.8 Functional Description .......................................................................................378
27.9 Advanced Interrupt Controller (AIC) User Interface ...........................................388
28 Serial Peripheral Interface (SPI) ..........................................................399