Datasheet
iii
SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
15.2 Embedded Characteristics ................................................................................111
15.3 Block Diagram ...................................................................................................111
15.4 Functional Description .......................................................................................111
15.5 Periodic Interval Timer (PIT) User Interface ......................................................113
16 Watchdog Timer (WDT) ........................................................................117
16.1 Description .........................................................................................................117
16.2 Embedded Characteristics ................................................................................117
16.3 Block Diagram ...................................................................................................117
16.4 Functional Description .......................................................................................118
16.5 Watchdog Timer (WDT) User Interface .............................................................120
17 Shutdown Controller (SHDWC) ...........................................................123
17.1 Description .........................................................................................................123
17.2 Embedded Characteristics ................................................................................123
17.3 Block Diagram ...................................................................................................123
17.4 I/O Lines Description .........................................................................................124
17.5 Product Dependencies ......................................................................................124
17.6 Functional Description .......................................................................................125
17.7 Shutdown Controller (SHDWC) User Interface .................................................126
18 General Purpose Backup Registers (GPBR) .....................................129
18.1 Description .........................................................................................................129
18.2 Embedded Characteristics ................................................................................129
18.3 General Purpose Backup Registers (GPBR) User Interface ............................129
19 Bus Matrix (MATRIX) ............................................................................131
19.1 Description .........................................................................................................131
19.2 Embedded Characteristics ................................................................................131
19.3 Memory Mapping ...............................................................................................134
19.4 Special Bus Granting Mechanism .....................................................................135
19.5 Arbitration ..........................................................................................................136
19.6 Write Protect Registers ......................................................................................139
19.7 Bus Matrix (MATRIX) User Interface .................................................................140
20 External Memories ...............................................................................155
20.1 DDRSDRC0 Multi-port DDRSDR Controller ......................................................155
20.2 External Bus Interface (EBI) ..............................................................................160
21 Static Memory Controller (SMC) .........................................................185
21.1 Description .........................................................................................................185