Datasheet

i
SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
Table of Contents
Features .....................................................................................................1
1 Description ................................................................................................2
2 Block Diagram ..........................................................................................3
3 Signal Description ....................................................................................4
4 Package and Pinout ...............................................................................11
4.1 Mechanical Overview of the 324-ball TFBGA Package .........................................11
4.2 324-ball TFBGA Package Pinout ...........................................................................12
5 Power Considerations ...........................................................................14
5.1 Power Supplies ......................................................................................................14
6 Memories .................................................................................................15
6.1 Memory Mapping ...................................................................................................16
6.2 Embedded Memories ............................................................................................16
6.3 I/O Drive Selection and Delay Control ...................................................................17
7 System Controller ..................................................................................19
7.1 System Controller Mapping ...................................................................................20
7.2 System Controller Block Diagram ..........................................................................21
7.3 Chip Identification ..................................................................................................22
7.4 Backup Section ......................................................................................................22
8 Peripherals ..............................................................................................23
8.1 Peripheral Mapping ...............................................................................................23
8.2 Peripheral Identifiers ..............................................................................................23
8.3 Peripheral Interrupts and Clock Control ................................................................24
8.4 Peripheral Signals Multiplexing on I/O Lines .........................................................24
9 ARM926EJ-S Processor Overview ........................................................31
9.1 Description .............................................................................................................31
9.2 Embedded Characteristics ....................................................................................32
9.3 Block Diagram .......................................................................................................33
9.4 ARM9EJ-S Processor ............................................................................................34
9.5 CP15 Coprocessor ................................................................................................42
9.6 Memory Management Unit (MMU) ........................................................................44
9.7 Caches and Write Buffer .......................................................................................46
9.8 Tightly-Coupled Memory Interface ........................................................................48