Datasheet
1327
SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
Figure 47-24. UART SPI Slave Mode
Figure 47-25. SPI Slave Mode - NPCS Timings
Table 47-46. UART SPI Timings with 3.3V Peripheral Supply
Symbol Parameter Cond Min Max Units
Master Mode
SPI
0
SPCK Period ns
SPI
1
Input Data Setup Time 17.2 ns
SPI
2
Input Data Hold Time 0 ns
SPI
3
Chip Select Active to Serial Clock 3.5 ns
SPI
4
Output Data Setup Time 0.2 ns
SPI
5
Serial Clock to Chip Select Inactive -0.3 ns
Slave Mode
SPI
6
SPCK falling to MISO 13.8
(1)
16.9
(1)
ns
SPI
7
MOSI Setup time before SPCK rises 7.5 ns
SPI
8
MOSI Hold time after SPCK rises 2.9 ns
SPCK
MISO
MOSI
SPI
6
SPI
7
SPI
8
NPCS0
SPI
12
SPI
13
SPCK
(CPOL = 0)
MISO
SPI
14
SPI
16
SPI
12
SPI
15
SPI
13
SPCK
(CPOL = 1)
SPI
6
SPI
9