Datasheet

1246
SAM9M10 [DATASHEET]
6355F–ATARM–12-Mar-13
46.10.3 Decoder Device Configuration Register
Name: VDEC_DDCR
Address: 0x00900008
Access: Read-write
• MAX_BURST_LEN: Maximum burst length for decoder bus transactions
Valid values for AHB are 0, 1, 4, 8, 16 and 17.
0: INCR transfer type is used always.
1: SINGLE transfer type is used always.
4: INCR4, INCR and SINGLE transfers are allowed. INCR used for 2 and 3 bursts.
8: INCR8, INCR4, INCR and SINGLE transfers are allowed. INCR used for 2 and 3 bursts.
16: INCR16, INCR8, INCR4, INCR and SINGLE transfers are allowed. INCR used for 2 and 3 bursts.
17: INCR16, INCR8, INCR4, INCR and SINGLE transfers are allowed. INCR used for 2, 3, 5, 6, 7, 9, 10, 11, 12, 13, 14 and
15 bursts.
• PRIOR: Decoder core internal bus service priority
0: Dynamic priority depending on stream content.
1: Post-processor output write has highest priorit.y
2: Input stream read has highest priority.
3: Reference picture read has highest priority, then post-processor transactions.
4: Reference picture read has highest priority, then decoder output write.
• DO_LE: Decoder Output Endian Mode
0: Big endian
1: Little endian
• INTCE_LE: Interface Endian Mode
0: Big endian
1: Little endian
• DDCGE: Decoder Dynamic Clock Gating Enable
0: Clock is running for all structures.
1: Clock is gated for decoder structures that are not used.
Clock gating value should be changed only when the decoder is disabled.
31 30 29 28 27 26 25 24
––––––––
23 22 21 20 19 18 17 16
HTI – DI_LE – – AHB_BURST DOPF LAT_COMP
15 14 13 12 11 10 9 8
LAT_COMP DDCGE INTCE_LE DO_LE
76543210
PRIOR MAX_BURST_LEN