Datasheet

30
SAM9G45 [Summary]
6438IS–ATARM–12-Feb-13
8.2 System Controller Block Diagram
Figure 8-1. SAM9G45 System Controller Block Diagram
NRST
SLCK
Advanced
Interrupt
Controller
Real-Time
Timer
Periodic
Interval
Timer
Reset
Controller
PA0-PA31
periph nreset
System Controller
Watchdog
Timer
wdt fault
WDRPROC
PIO
Controllers
Power
Management
Controller
XIN
XOUT
MAINCK
PLLACK
pit irq
MCK
proc nreset
wdt irq
periph irq 2..6
periph nreset
periph clk 2..30
PCK
MCK
pmc irq
nirq
nfiq
rtt irq
Embedded
Peripherals
periph clk 2..6
pck 0-1
in
out
enable
ARM926EJ-S
SLCK
SLCK
irq
fiq
irq0-irq2
fiq
periph irq 6..30
periph irq 2..24
int
int
periph nreset
periph clk 6..30
tag nreset
por ntrst
proc nreset
periph nreset
dbgu txd
dbgu rxd
pit irq
dbgu irq
pmc irq
rstc irq
wdt irq
rstc irq
SLCK
Boundary Scan
TAP Controller
tag nreset
debug
PCK
debug
idle
debug
Bus Matrix
MCK
periph nreset
proc nreset
backup nreset
periph nreset
idle
Debug
Unit
dbgu irq
MCK
dbgu rxd
periph nreset
dbgu txd
rtt alarm
Shut-Down
Controller
SLCK
rtt0 alarm
backup nreset
SHDN
WKUP
4 General-purpose
Backup Registers
backup nreset
XIN32
XOUT32
PB0-PB31
PC0-PC31
VDDBU Powered
VDDCORE Powered
ntrst
VDDCORE
POR
12MHz
MAIN OSC
PLLA
VDDBU
POR
SLOW
CLOCK
OSC
UPLL
por ntrst
VDDBU
rtt irq
UPLLCK
USB High Speed
Device Port
UPLLCK
periph nreset
periph irq 24
RC
OSC
PD0-PD31
SCKCR
PE0-PE31
Real-Time
Clock
rtc irq
SLCK
backup nreset
rtc alarm
USB High Speed
Host Port
UPLLCK
periph nreset
periph irq 25
UHP48M
UHP12M
UHP48M
UHP12M
DDR sysclk