Datasheet
28
SAM9G45 [Summary]
6438IS–ATARM–12-Feb-13
z SDRAM Power-up Initialization by Software
z CAS Latency of 2, 3 Supported
z Auto Precharge Command Not Used
z SDR-SDRAM with 16-bit Datapath and Eight Columns Not Supported
z Clock Frequency Change in Precharge Power-down Mode Not Supported
7.3.2.3 NAND Flash Error Corrected Code Controller
z Tracking the accesses to a NAND Flash device by triggering on the corresponding chip select
z Single bit error correction and 2-bit Random detection.
z Automatic Hamming Code Calculation while writing
z ECC value available in a register
z Automatic Hamming Code Calculation while reading
z Error Report, including error flag, correctable error flag and word address being detected erroneous
z Support 8- or 16-bit NAND Flash devices with 512-, 1024-, 2048- or 4096-bytes pages