Datasheet

23
SAM9G35 [DATASHEET]
11053E–ATARM–10-Mar-2014
Figure 7-1. SAM9G35 System Controller Block Diagram
NRST
SLCK
Advanced
Interrupt
Controller
Per i o d i c
Int erval
Ti mer
Re s e t
Controller
PA0-PA31
periph_nreset
System Controller
Wat ch dog
Ti mer
wdt_fault
W D RP RO C
PIO
Controllers
Power
Management
Controller
XIN
XOUT
MAINCK
PLLACK
pit_irq
MCK
proc_nreset
wdt_irq
periph_irq[2..3]
periph_nreset
periph_clk[2..30]
PCK
MCK
pmc_irq
nirq
nfiq
Embedded
Peripherals
periph_clk[2..3]
pck[0-1]
in
out
enable
ARM926EJ-S
SL CK
irq
fiq
irq
fiq
periph_irq[5..30]
periph_irq[2..30]
int
int
periph_nreset
periph_clk[5..30]
jtag_nreset
por_ntrst
proc_nreset
periph_nreset
dbgu_txd
dbgu_rxd
pit_irq
dbgu_irq
pmc_irq
rstc_irq
wdt_irq
rstc_irq
SL CK
Bo u n d ar y Scan
TAP Controller
jtag_nreset
debug
PCK
debug
idle
debug
Bu s Mat ri x
MCK
periph_nreset
proc_nreset
periph_nreset
idle
Debug
Uni t
dbgu_irq
MCK
dbgu_rxd
periph_nreset
dbgu_txd
Sh u t - D o w n
Controller
SL CK
backup_nreset
SH D N
WKUP
4 General-purpose
Backup Registers
backup_nreset
XIN32
XOUT32
PB0-PB18
PC0-PC31
VDDBU Powered
VDDCORE Powered
ntrst
VDDCORE
POR
12MHz
MAIN OSC
PLLA
VDDBU
POR
SLOW
CLOCK
OSC
UPLL
por_ntrst
VDDBU
UPLLCK
USB High Speed
Device Port
UPLLCK
periph_nreset
periph_irq[22]
32K RC
OSC
PD0-PD21
SCKC_CR
Re a l - T i m e
Cl o c k
rtc_irq
SL CK
backup_nreset
rt c_alarm
USB High Speed
Host Port
UPLLCK
periph_nreset
periph_irq[23]
UHP48M
UHP12M
UHP48M
UHP12M
DDRCK
12M RC
OSC
rtc_alarm
LCD Pixel clock
SMDCK = periph_clk[4]
SMD
Software Modem
SMDCK
periph_nreset
periph_irq[4]
BSC_CR