Datasheet

224
SAM9G35 [DATASHEET]
11053E–ATARM–10-Mar-2014
23.5.15 Write Protection Registers
To prevent any single software error that may corrupt PIO behavior, certain address spaces can be write-protected by
setting the WPEN bit in the “PIO Write Protect Mode Register” (PIO_WPMR).
If a write access to the protected registers is detected, then the WPVS flag in the PIO Write Protect Status Register
(PIO_WPSR) is set and the field WPVSRC indicates in which register the write access has been attempted.
The WPVS flag is reset by writing the PIO Write Protect Mode Register (PIO_WPMR) with the appropriate access key,
WPKEY.
The protected registers are:
 “PIO Enable Register” on page 229
 “PIO Disable Register” on page 230
 “PIO Output Enable Register” on page 232
 “PIO Output Disable Register” on page 233
 “PIO Input Filter Enable Register” on page 235
 “PIO Input Filter Disable Register” on page 236
 “PIO Multi-driver Enable Register” on page 246
 “PIO Multi-driver Disable Register” on page 247
 “PIO Pull Up Disable Register” on page 249
 “PIO Pull Up Enable Register” on page 250
 “PIO Peripheral ABCD Select Register 1” on page 252
 “PIO Peripheral ABCD Select Register 2” on page 253
 “PIO Output Write Enable Register” on page 261
 “PIO Output Write Disable Register” on page 262
 “PIO Pad Pull Down Disable Register” on page 258
 “PIO Pad Pull Down Status Register” on page 260