Datasheet

1275
SAM9G35 [DATASHEET]
11053E–ATARM–10-Mar-2014
Section 25. “Bus Matrix (MATRIX)”
Table 25-1 “List of Bus Matrix Masters”:
- corrected description of Master 9 (was “ISI DMA”; is “LCD DMA”)
- added Master 11 (Reserved)
Section 25.2.2 “Matrix Slaves”: in first sentence, replaced “manages 9 slaves” with “manages 10 slaves”
Table 25-3 “Master to Slave Access”: corrected description of Master 9 (was “ISI DMA”; is “LCD DMA”)
Section 25.6 “Register Write Protection”: changed title (was “Write Protect Registers”) and revised contents
Deleted section “Chip Configuration User Interface” (register CCFG_EBICSA is now found in Section 25.7 “Bus Matrix
(MATRIX) User Interface”
Table 25-4 “Register Mapping”:
- defined offset 0x002C as reserved
- defined offsets 0x0104–0x011C as reserved
- at offset 0x0120, inserted register CCFG_EBICSA
- defined offsets 0x0124–0x01FC as reserved
Section 25.7.1 “Bus Matrix Master Configuration Registers”: inserted sentence about write protection
Section 25.7.2 “Bus Matrix Slave Configuration Registers”: inserted sentence about write protection
Section 25.7.3 “Bus Matrix Priority Registers A For Slaves”:
- updated register range in Name (was MATRIX_PRAS0...MATRIX_PRAS8; is MATRIX_PRAS0...MATRIX_PRAS9)
- inserted sentence about write protection
Section 25.7.4 “Bus Matrix Priority Registers B For Slaves”:
- updated register range in Name (was MATRIX_PRBS0...MATRIX_PRBS8; is MATRIX_PRBS0...MATRIX_PRBS9)
- inserted sentence about write protection
Section 25.7.5 “Bus Matrix Master Remap Control Register”: inserted sentence about write protection
Section 25.7.6 “EBI Chip Select Assignment Register”: changed reset value from 0x00000000 to 0x00000200 ; updated
NFD0_ON_D16 and DDR_MP_EN bit descriptions
Updated Section 25.7.7 “Write Protection Mode Register”
Updated Section 25.7.8 “Write Protection Status Register”
Section 26. “External Bus Interface (EBI)”
Section 26.2 “Embedded Characteristics”: replaced bullet “MLC Nand Flash ECC Controller” with “8-bit NAND Flash ECC
Controller”
Table 26-4 “EBI Pins and External Device Connections”: in footnote, replaced instance of “D16-D24” with “D16–D23”
Section 26.5.3.4 “Power supplies”: in second paragraph, replaced instance of “D16-D32” with “D16–D31”
Section 44. “Ethernet MAC 10/100 (EMAC)”
Table 44-5 “Pin Configuration”:
- removed unused signals
- in “Pin Name” column, renamed ERX0–ERX3: is now ERX0–ERX1
- in “Pin Name” column, renamed ETX0–ETX3: is now ETX0–ETX1
Doc. Rev.
11053E Comments