Datasheet

1263
SAM9G35 [DATASHEET]
11053E–ATARM–10-Mar-2014
46.18.5 USART in SPI Mode Timings
46.18.5.1 Timing conditions
Timings are given assuming a capacitance load as defined in Table 46-45.
46.18.5.2 Timing extraction
Figure 46-26.USART SPI Master Mode
Figure 46-27.USART SPI Slave mode: (Mode 1 or 2)
Table 46-45. Capacitance Load
Supply
Corner
Max Min
3.3V 40 pF 5 pF
1.8V 20 pF 5 pF
NSS
SPI
0
MSB
LSB
SPI
1
CPOL=1
CPOL=0
MISO
MOSI
SCK
SPI
5
SPI
2
SPI
3
SPI
4
SPI
4
SCK
MISO
MOSI
SPI
6
SPI
7
SPI
8
NSS
SPI
12
SPI
13