Datasheet

1148
SAM9G25 [DATASHEET]
11032D–ATARM–10-Mar-2014
SPI:
Added references on SPKC in Section 35.2 “Embedded Characteristics”.
8541
ADC:
Section 40.5.4 “I/O Lines”, added references on AD0-AD4 signals in Table 40-3 “I/O Lines”.
Mechanical Overview:
Replaced ‘247-ball BGA’ with ‘247-ball TFBGA’ and added 247-ball VFBGA package references in:
- Section 47.2 “247-ball BGA Packages”, including:
- Section 47.2.1 “247-ball TFBGA package”
- Section 47.2.2 “247-ball VFBGA package”
Updated the table title in Table 47-6 “Package Information”.
8593
rfo
Ordering Information:
Replaced ‘247-ball BGA’ with ‘247-ball TFBGA’ and added 247-ball VFBGA package references in Table 48-1
“SAM9G25 Ordering Information”.
8593
Errata:
Added Section 49.5 “Timer Counter (TC)”.8517
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Introduction:
Section 4.5 “247-ball BGA Package Pinout”, Table 4-4 “Pin Description BGA247”: fixed typos (inverted “PD1” and
“VDDCORE” in lines U15 and P17, incorrect data in lines J10 and E10) and added missing references to AD0-
AD4 channels (lines B5, E5, B’, A1, B3).
Section 6.3.3 “DDR2SDR Controller”, replaced LPDDR2 with LPDDR.
Added “Write Protected Registers” in the peripherals list in Section 1. “Features”.
Added “4-bank” references to the DDR2 characteristics in Section 1. “Features”, Section 2. “Block Diagram” and
Section 6.3.3 “DDR2SDR Controller”.
Section 5.1 “Power Supplies”, added PLLUTMI cell as a power to the VDDPLLA line in Table 5-1 “SAM9G25
Power Supplies”.
Section 1. “Features”, replaced “MLC/SLC NAND Controller“ with “MLC/SLC 8-bit NAND Controller” in Memories
list.
Section 6.3.2 “Static Memory Controller”, replaced “8- or 16-bit Data Bus” with “8-bit, 16-bit, or 32-bit Data Bus”.
Replaced TSADVREF with ADVREF in Figure 2-1 “SAM9G25 Block Diagram”.
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8146
8213
8282
8368
8403
8420
8454
Boot Startegies:
Section 11.3 “Chip Setup”, added Table 11-1 “External Clock and Crystal Frequencies allowed for Boot
Sequence (in MHz)” and the corresponding text below the table.
Section 11.4.1 “NVM Boot Sequence”, replaced “Boot Sequence Register (BSCR)” with “Boot Sequence
Configuration Register (BSC_CR)” and updated the acronym of this register in the entire section.
Added a reference to the “Boot Sequence Controller (BSC)” section.
Replaced “BSCR value” with “BOOT Value” in the heading line in Table 11-2 “Boot Sequence Configuration
Register Values”.
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Doc. Rev.
11032C Comments
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