Datasheet

501
SAM9G25 [DATASHEET]
11032C–ATARM–25-Jan-13
31.7.17 DMAC Channel x [x = 0..7] Control B Register
Name: DMAC_CTRLBx [x = 0..7]
Address: 0xFFFFEC4C (0)[0], 0xFFFFEC74 (0)[1], 0xFFFFEC9C (0)[2], 0xFFFFECC4 (0)[3], 0xFFFFECEC (0)[4],
0xFFFFED14 (0)[5], 0xFFFFED3C (0)[6], 0xFFFFED64 (0)[7], 0xFFFFEE4C (1)[0], 0xFFFFEE74 (1)[1],
0xFFFFEE9C (1)[2], 0xFFFFEEC4 (1)[3], 0xFFFFEEEC (1)[4], 0xFFFFEF14 (1)[5], 0xFFFFEF3C (1)[6],
0xFFFFEF64 (1)[7]
Access: Read-write
Reset: 0x00000000
This register can only be written if the WPEN bit is cleared in “DMAC Write Protect Mode Register” .
• SIF: Source Interface Selection Field
• DIF: Destination Interface Selection Field
• SRC_PIP: Source Picture-in-Picture Mode
0 (DISABLE): Picture-in-Picture mode is disabled. The source data area is contiguous.
1 (ENABLE): Picture-in-Picture mode is enabled. When the source PIP counter reaches the programmable boundary, the
address is automatically incremented by a user defined amount.
• DST_PIP: Destination Picture-in-Picture Mode
0 (DISABLE): Picture-in-Picture mode is disabled. The Destination data area is contiguous.
1 (ENABLE): Picture-in-Picture mode is enabled. When the Destination PIP counter reaches the programmable boundary the
address is automatically incremented by a user-defined amount.
• SRC_DSCR: Source Address Descriptor
0 (FETCH_FROM_MEM): Source address is updated when the descriptor is fetched from the memory.
1 (FETCH_DISABLE): Buffer Descriptor Fetch operation is disabled for the source.
31 30 29 28 27 26 25 24
AUTO IEN DST_INCR – – SRC_INCR
23 22 21 20 19 18 17 16
FC DST_DSCR – – – SRC_DSCR
15 14 13 12 11 10 9 8
–– DST_PIP–––SRC_PIP
76543210
–– DIF –– SIF
Value Name Description
00 AHB_IF0 The source
transfer is done via AHB-Lite Interface 0
01 AHB_IF1 The source transfer is done via AHB-Lite Interface 1
Value Name Description
00 AHB_IF0 The destination
transfer is done via AHB-Lite Interface 0
01 AHB_IF1 The destination transfer is done via AHB-Lite Interface 1