Datasheet

1073
SAM9G25 [DATASHEET]
11032C–ATARM–25-Jan-13
46.17.6 USART in SPI Mode Timings
46.17.6.1 Timing conditions
Timings are given assuming a capacitance load on
Table 46-37.
46.17.6.2 Timing extraction
Figure 46-24.USART SPI Master Mode
Figure 46-25.USART SPI Slave mode: (Mode 1 or 2)
Table 46-45. Capacitance Load
Corner
Supply MAX MIN
3.3V 40pF 5 pF
1.8V 20pF 5 pF
NSS
SPI
0
MSB
LSB
SPI
1
CPOL=1
CPOL=0
MISO
MOSI
SCK
SPI
5
SPI
2
SPI
3
SPI
4
SPI
4
SCK
MISO
MOSI
SPI
6
SPI
7
SPI
8
NSS
SPI
12
SPI
13