Datasheet

33
SAM9G25 [DATASHEET]
11032BS–ATARM–09-Jul-13
Revision History
In the tables that follow, the most recent version of the document appears first.
“rfo” indicates changes requested during the document review and approval loop.
Doc. Rev
11032BS Comments
Change
Request
Ref.
“Description”, added “4-bank” references to the DDR2 characteristics.
Section 1. “Features”:
- added “4-bank” references to the DDR2 characteristics in the “Memories” list
- replaced “MLC/SLC NAND Controller“ with “MLC/SLC 8-bit NAND Controller” in the “Memories” list
- added “Write Protected Registers” in the “Peripherals” list
Section 2. “Block Diagram”, replaced TSADVREF with ADVREF in Figure 2-1 “SAM9G25 Block
Diagram”.
Section 4.5 “247-ball BGA Package Pinout”, fixed typos in Table 4-4 “Pin Description BGA247”:
- inverted “PD1” and “VDDCORE” in lines U15 and P17,
- corrected data in lines J10 and E10
- added missing references to AD0-AD4 channels (lines B5, E5, B’, A1, B3)
Section 5. “Mechanical Overview”, updated the table titles in Table 5-3 “Package Information” and Table
5-5 “Package Information”.
Replaced ‘247-ball BGA’ with ‘247-ball TFBGA’ and added 247-ball VFBGA package references in:
- “Description”
- Section 1. “Features”
- Section 4. “Package and Pinout”
- Section 5. “Mechanical Overview”
- Section 6. “SAM9G25 Ordering Information”
Fixed typos in Table 4-3 “Pin Description BGA217” (balls A1, B1; signals D16-D31) and Table 4-4 “Pin
Description BGA247” (balls A2, C5, P17, U15, J10, E10; signals AD0-AD4, D16-D31).
8282
8282
8403
8213
8454
8071
8186
8593
8579,
8604
Doc. Rev
11032AS Comments
Change
Request
Ref.
First issue.