Datasheet

994
SAM9G15 [DATASHEET]
11052D–ATARM–31-Oct-12
44.7 LCD Controller (LCDC) User Interface
Table 44-55. Register Mapping
Offset Register Name Access Reset
0x00000000 LCD Controller Configuration Register 0 LCDC_LCDCFG0 Read-write 0x00000000
0x00000004 LCD Controller Configuration Register 1 LCDC_LCDCFG1 Read-write 0x00000000
0x00000008 LCD Controller Configuration Register 2 LCDC_LCDCFG2 Read-write 0x00000000
0x0000000C LCD Controller Configuration Register 3 LCDC_LCDCFG3 Read-write 0x00000000
0x00000010 LCD Controller Configuration Register 4 LCDC_LCDCFG4 Read-write 0x00000000
0x00000014 LCD Controller Configuration Register 5 LCDC_LCDCFG5 Read-write 0x00000000
0x00000018 LCD Controller Configuration Register 6 LCDC_LCDCFG6 Read-write 0x00000000
0x0000001C Reserved – – –
0x00000020 LCD Controller Enable Register LCDC_LCDEN Write-only –
0x00000024 LCD Controller Disable Register LCDC_LCDDIS Write-only –
0x00000028 LCD Controller Status Register LCDC_LCDSR Read-only 0x00000000
0x0000002C LCD Controller Interrupt Enable Register LCDC_LCDIER Write-only -
0x00000030 LCD Controller Interrupt Disable Register LCDC_LCDIDR Write-only -
0x00000034 LCD Controller Interrupt Mask Register LCDC_LCDIMR Read-only 0x00000000
0x00000038 LCD Controller Interrupt Status Register LCDC_LCDISR Read-only 0x00000000
0x0000003C Reserved – – –
0x00000040 Base Layer Channel Enable Register LCDC_BASECHER Write-only 0x00000000
0x00000044 Base Layer Channel Disable Register LCDC_BASECHDR Write-only 0x00000000
0x00000048 Base Layer Channel Status Register LCDC_BASECHSR Read-only 0x00000000
0x0000004C Base Layer Interrupt Enable Register LCDC_BASEIER Write-only 0x00000000
0x00000050 Base Layer Interrupt Disabled Register LCDC_BASEIDR Write-only 0x00000000
0x00000054 Base Layer Interrupt Mask Register LCDC_BASEIMR Read-only 0x00000000
0x00000058 Base Layer Interrupt status Register LCDC_BASEISR Read-only 0x00000000
0x0000005C Base Layer DMA Head Register LCDC_BASEHEAD Read-write 0x00000000
0x00000060 Base Layer DMA Address Register LCDC_BASEADDR Read-write 0x00000000
0x00000064 Base Layer DMA Control Register LCDC_BASECTRL Read-write 0x00000000
0x00000068 Base Layer DMA Next Register LCDC_BASENEXT Read-write 0x00000000
0x0000006C Base Layer Configuration Register 0 LCDC_BASECFG0 Read-write 0x00000000
0x00000070 Base Layer Configuration Register 1 LCDC_BASECFG1 Read-write 0x00000000
0x00000074 Base Layer Configuration Register 2 LCDC_BASECFG2 Read-write 0x00000000
0x00000078 Base Layer Configuration Register 3 LCDC_BASECFG3 Read-write 0x00000000
0x0000007C Base Layer Configuration Register 4 LCDC_BASECFG4 Read-write 0x00000000
0x80-0xFC Reserved – – –
0x00000100 Overlay 1 Channel Enable Register LCDC_OVRCHER1 Write-only 0x00000000
0x00000104 Overlay 1 Channel Disable Register LCDC_OVRCHDR1 Write-only 0x00000000
0x00000108 Overlay 1 Channel Status Register LCDC_OVRCHSR1 Read-only 0x00000000
0x0000010C Overlay 1 Interrupt Enable Register LCDC_OVRIER1 Write-only 0x00000000
0x00000110 Overlay 1 Interrupt Disable Register LCDC_OVRIDR1 Write-only 0x00000000