Datasheet

876
SAM9G15 [DATASHEET]
11052D–ATARM–31-Oct-12
41.6.2 Conversion Reference
The conversion is performed on a full range between 0V and the reference voltage pin ADVREF. Analog inputs between
these voltages convert to values based on a linear conversion.
41.6.3 Conversion Resolution
The ADC supports 8-bit or 10-bit resolutions. The 8-bit selection is performed by setting the LOWRES bit in the ADC
Mode Register (ADC_MR). By default, after a reset, the resolution is the highest and the DATA field in the data registers
is fully used. By setting the LOWRES bit, the ADC switches to the lowest resolution and the conversion results can be
read in the lowest significant bits of the data registers. The two highest bits of the DATA field in the corresponding
ADC_CDR register and of the LDATA field in the ADC_LCDR register read 0.
41.6.4 Conversion Results
When a conversion is completed, the resulting 10-bit digital value is stored in the Channel Data Register (ADC_CDRx) of
the current channel and in the ADC Last Converted Data Register (ADC_LCDR). By setting the TAG option in the
ADC_EMR, the ADC_LCDR presents the channel number associated to the last converted data in the CHNB field.
The channel EOC bit in the Status Register (ADC_SR) is set and the DRDY is set. In the case of a connected DMA
channel, DRDY rising triggers a data transfer request. In any case, either EOC and DRDY can trigger an interrupt.
Reading one of the ADC_CDR registers clears the corresponding EOC bit. Reading ADC_LCDR clears the DRDY bit.
Figure 41-3. EOCx and DRDY Flag Behavior
If the ADC_CDR is not read before further incoming data is converted, the corresponding Overrun Error (OVREx) flag is
set in the Overrun Status Register (ADC_OVER).
Likewise, new data converted when DRDY is high sets the GOVRE bit (General Overrun Error) in ADC_SR.
The OVREx flag is automatically cleared when ADC_OVER is read, and GOVRE flag is automatically cleared when
ADC_SR is read.
Read the ADC_CDRx
EOCx
DRDY
Read the ADC_LCDR
CHx
(ADC_CHSR)
(ADC_SR)
(ADC_SR)
Write the ADC_CR
with START = 1
Write the ADC_CR
with START = 1