Datasheet

567
SAM9G15 [DATASHEET]
11052D–ATARM–31-Oct-12
32.7.22 UDPHS DMA Next Descriptor Address Register
Name: UDPHS_DMANXTDSCx [x = 0..5]
Address: 0xF803C300 [0], 0xF803C310 [1], 0xF803C320 [2], 0xF803C330 [3], 0xF803C340 [4], 0xF803C350 [5]
Access: Read-write
Note: Channel 0 is not used.
• NXT_DSC_ADD: Next Descriptor Address
This field points to the next channel descriptor to be processed. This channel descriptor must be aligned, so bits 0 to 3 of the
address must be equal to zero.
31 30 29 28 27 26 25 24
NXT_DSC_ADD
23 22 21 20 19 18 17 16
NXT_DSC_ADD
15 14 13 12 11 10 9 8
NXT_DSC_ADD
76543210
NXT_DSC_ADD