Datasheet

314
SAM9G15 [DATASHEET]
11052D–ATARM–31-Oct-12
26.5.4.7 8-bit NAND Flash with NFD0_ON_D16 = 1
Hardware Configuration
Software Configuration
The following configuration has to be performed:
z Set NFD0_ON_D16 = 1 in the EBI Chip Select Assignment Register located in the bus matrix memory space
z Assign the EBI CS3 to the NAND Flash by setting the bit EBI_CS3A in the EBI Chip Select Assignment Register
z Reserve A21 / A22 for ALE / CLE functions. Address and Command Latches are controlled respectively by setting
to 1 the address bit A21 and A22 during accesses.
z Configure a PIO line as an input to manage the Ready/Busy signal.
z Configure Static Memory Controller CS3 Setup, Pulse, Cycle and Mode accordingly to NAND Flash timings, the
data bus width and the system bus frequency.