Datasheet

305
SAM9G15 [DATASHEET]
11052D–ATARM–31-Oct-12
In the following example the NAND Flash and the external RAM (DDR2 or LP-DDR or 16-bit LP-SDR) are in the same
power supply range, (NFD0_ON_D16 = default).
In the following example the NAND Flash and the external RAM (DDR2 or LP-DDR or 16bit LP-SDR) are NOT in the
same power supply range (NFD0_ON_D16 = 1).
This can be used if the SMC connects to the NAND Flash only. Using this function with another device on the SMC will
lead to an unpredictable behavior of that device. In that case, the default value must be selected.
At reset NFD0_ON_D16 = 0 and NAND Flash bus is connected to D0-D15.
26.5.3.5 Static Memory Controller
For information on the Static Memory Controller, refer to the Static Memory Controller section of this datasheet.
26.5.3.6 DDR2SDRAM Controller
The product embeds a multi-port DDR2SDR Controller. This allows to use three additional ports on DDR2SDRC to
lessen the EBI load from a part of DDR2 or LP-DDR accesses. This increases the bandwidth when DDR2 and NAND
Flash devices are used. This feature is NOT compatible with SDR or LP-SDR Memory.
D[15:0]
ALE
A[22:21]
CLE
D[15:0]
EBI
NAND Flash (1.8V)
DDR2 or
LP-DDR or
16-bit LP-SDR (1.8V)
D[15:0]
D[15:0]
ALE
A[22:21]
CLE
D[15:0]
EBI
NAND Flash (3.3V)
32bit SDRAM (3.3V)
D[15:0]
D[31:16]
D[31:16]
D[15:0]
ALE
A[22:21]
CLE
D[15:0]
EBI
NAND Flash (3.3V)
DDR2 or
LP-DDR or
16-bit LP-SDR (1.8V)
D[15:0]
D[31:16]